vishay siliconix si5482du document number: 73594 s-81448-rev. b, 23-jun-08 www.vishay.com 1 n-channel 30-v (d-s) mosfet features ? halogen-free ? trenchfet ? power mosfet ? new thermally enhanced powerpak ? chipfet ? package - small footprint area - low on-resistance - thin 0.8 mm profile applications ? load switch, pa switch, and battery switch for portable applications product summary v ds (v) r ds(on) ( ) i d (a) a q g (typ.) 30 0.015 at v gs = 10 v 12 16 nc 0.0175 at v gs = 4.5 v 12 ordering information: SI5482DU-T1-GE3 (lead (pb)-free and halogen-free) marking code ae xxx lot traceability and date code part # code bottom view powerpak chipfet single d d d g 1 2 8 7 6 5 d d d s 3 4 s n-channel mosfet g d s notes: a. package limited. b. surface mounted on 1" x 1" fr4 board. c. t = 5 s. d. see solder profile ( http://www.vishay.com/ppg?73257 ). the powerpak chipfet is a leadless package. the end of the lead terminal is exposed copper (not plated) as a result of the si ngulation process in manufacturing. a solder fillet at the exposed copper tip cannot b e guaranteed and is not required to ensure adequate bottom side solder interconnection. e. rework conditions: manual soldering with a sol dering iron is not recommended for leadless components. f. maximum under steady state conditions is 90 c/w. absolute maximum ratings t a = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds 30 v gate-source voltage v gs 12 continuous drain current (t j = 150 c) t c = 25 c i d 12 a a t c = 70 c 12 a t a = 25 c 11.1 b, c t a = 70 c 8.8 b, c pulsed drain current i dm 40 continuous source-drain diode current t c = 25 c i s 12 a t a = 25 c 2.6 b, c maximum power dissipation t c = 25 c p d 31 w t c = 70 c 20 t a = 25 c 3.1 b, c t a = 70 c 2 b, c operating junction and storage temperature range t j , t stg - 55 to 150 c soldering recommendations (peak temperature) d, e 260 thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient b, f t 5 s r thja 34 40 c/w maximum junction-to-case (drain) steady state r thjc 34 rohs compliant
www.vishay.com 2 document number: 73594 s-81448-rev. b, 23-jun-08 vishay siliconix si5482du notes: a. pulse test; pulse width 300 s, duty cycle 2 %. b. guaranteed by design, not subject to production testing. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 1 ma 30 v v ds temperature coefficient v ds /t j i d = 250 a 24.5 mv/c v gs(th) temperature coefficient v gs(th) /t j - 4.3 gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 0.6 2 v gate-source leakage i gss v ds = 0 v, v gs = 12 v 100 ns zero gate voltage drain current i dss v ds = 30 v, v gs = 0 v 1 a v ds = 30 v, v gs = 0 v, t j = 55 c 10 on-state drain current a i d(on) v ds 5 v, v gs = 10 v 30 a drain-source on-state resistance a r ds(on) v gs = 10 v, i d = 7.4 a 0.0125 0.015 v gs = 4.5 v, i d = 6.8 a 0.0145 0.0175 forward transconductance a g fs v ds = 15 v, i d = 7.4 a 35 s dynamic b input capacitance c iss v ds = 15 v, v gs = 0 v, f = 1 mhz 1610 pf output capacitance c oss 210 reverse transfer capacitance c rss 120 total gate charge q g v ds = 15 v, v gs = 10 v, i d = 11.1 a 34 51 nc v ds = 15 v, v gs = 4.5 v, i d = 11.1 a 16 24 gate-source charge q gs 3.6 gate-drain charge q gd 3.7 gate resistance r g f = 1 mhz 5.1 tu r n - o n d e l ay t i m e t d(on) v dd = 15 v, r l = 1.7 i d ? 8.8 a, v gen = 4.5 v, r g = 1 10 15 ns rise time t r 85 130 turn-off delay time t d(off) 30 45 fall time t f 10 15 tu r n - o n d e l ay t i m e t d(on) v dd = 15 v, r l = 1.7 i d ? 8.8 a, v gen = 10 v, r g = 1 510 rise time t r 10 15 turn-off delay time t d(off) 35 55 fall time t f 10 15 drain-source body diode characteristics continuous source-drain diode current i s t c = 25 c 12 a pulse diode forward current i sm 40 body diode voltage v sd i s = 8.8 a, v gs = 0 v 0.8 1.2 v body diode reverse recovery time t rr i f = 8.8 a, di/dt = 100 a/s, t j = 25 c 25 50 ns body diode reverse recovery charge q rr 18 27 nc reverse recovery fall time t a 14.5 ns reverse recovery rise time t b 10.5
document number: 73594 s-81448-rev. b, 23-jun-08 www.vishay.com 3 vishay siliconix si5482du typical characteristics 25 c, unless otherwise noted output characteristics on-resistance vs. drain current and gate voltage gate charge 0 8 16 24 32 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v gs = 10 thru 3 v v gs = 2 v v ds - drain-to-source voltage (v) ) a ( t n e r r u c n i a r d - i d 0 8 16 24 32 40 i d - drain current (a) v gs = 10 v r ) n o ( s d m ) ( e c n a t s i s e r - n o - v gs = 4.5 v 0.010 0.012 0.014 0.016 0.018 0 2 4 6 8 10 0 5 10 15 20 25 30 35 ) v ( e g a t l o v e c r u o s - o t - e t a g - q g - total gate charge (nc) v s g v ds = 15 v v ds = 24 v i d = 11.1 a transfer characteristics capacitance on-resistance vs. junction temperature 0 4 8 12 16 20 0.0 0.5 1.0 1.5 2.0 2.5 t c = 25 c t c = 125 c v gs - gate-to-source voltage (v) ) a ( t n e r r u c n i a r d - i d t c = - 55 c c rss 0 500 1000 1500 2000 2500 0 5 10 15 20 25 30 c oss c iss v ds - drain-to-source voltage (v) ) f p ( e c n a t i c a p a c - c 0.6 0.8 1.0 1.2 1.4 1.6 1.8 - 50 - 25 0 25 50 75 100 125 150 t j - junction temperature (c) r ) n o ( s d e c n a t s i s e r - n o - ) d e z i l a m r o n (
www.vishay.com 4 document number: 73594 s-81448-rev. b, 23-jun-08 vishay siliconix si5482du typical characteristics 25 c, unless otherwise noted source-drain diode forward voltage threshold voltage 0.0 0.2 0.4 0.6 0.8 1.0 1.2 40 1 10 t j = 150 c v sd - source-to-drain voltage (v) ) a ( t n e r r u c e c r u o s - i s t j = 25 c 0.4 0.6 0.8 1.0 1.2 1.4 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a t j - temperature (c) v ) h t ( s g ) v ( on-resistance vs. gate-to-source voltage single pulse power, junction-to-ambient 0246810 i d = 7.4 a v gs - gate-to-source voltage (v) r ) n o ( s d ( ) e c n a t s i s e r - n o e c r u o s - o t - n i a r d - t a = 25 c t a = 125 c 0.010 0.015 0.020 0.025 0.030 0.035 0.040 0 30 40 10 20 ) w ( r e w o p time (s) 1 1000 0.1 0.01 0.001 10 100 50 safe operating area, junction-to-ambient 100 1 0.1 1 100 0.01 10 ) a ( t n e r r u c n i a r d - i d 0.1 100 s t a = 25 c single pulse 10 ms 100 ms dc v ds - drain-to-source voltage (v) * v gs > minimum v gs at which r ds(on) is specified 1 s 10 s limited by r ds(on) * 10 1 ms bvdss limited
document number: 73594 s-81448-rev. b, 23-jun-08 www.vishay.com 5 vishay siliconix si5482du typical characteristics 25 c, unless otherwise noted * the power dissipation p d is based on t j(max) = 150 c, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the current rating, when this rating falls below the package limit. current derating* 0 8 16 24 32 40 0 25 50 75 100 125 150 package limited i d ) a ( t n e r r u c n i a r d - t c - case temperature (c) power derating 0 5 10 15 20 25 30 35 25 50 75 100 125 150 t c - case temperature (c) ) w ( n o i t a p i s s i d r e w o p
www.vishay.com 6 document number: 73594 s-81448-rev. b, 23-jun-08 vishay siliconix si5482du typical characteristics 25 c, unless otherwise noted vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?73594. normalized thermal transient impedance, junction-to-ambient 10 -3 10 -2 1 10 1000 10 -1 10 -4 100 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wave pulse duration (s) t n e i s n a r t e v i t c e f f e d e z i l a m r o n e c n a d e p m i l a m r e h t 1. duty cycle, d = 2. per unit base = r thja = 75 c/w 3. t jm - t a = p dm z thja (t) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm normalized thermal transient impedance, junction-to-case 10 -3 10 -2 1 10 -1 10 -4 0.2 0.1 0.05 0.02 duty cycle = 0.5 square wave pulse duration (s) t n e i s n a r t e v i t c e f f e d e z i l a m r o n e c n a d e p m i l a m r e h t single pulse 1 0.1
document number: 73203 www.vishay.com 19-jul-10 1 package information vishay siliconix powerpak ? chipfet ? single pad z d e c a b e h e 2 d 2 k l k 1 e 3 d 3 a 1 s (5) d (6) d (7) d (8) d (1) d (2) d (3) g (4) d (2) d (1) d (3) g (4) d (8) d (7) d (6) s (5) detail z backside view of single pad millimeters inches dim. min. nom. max. min. nom. max. a 0.70 0.75 0.85 0.028 0.030 0.033 a 1 0 - 0.05 0 - 0.002 b 0.25 0.30 0.35 0.010 0.012 0.014 c 0.15 0.20 0.25 0.006 0.008 0.010 d 2.92 3.00 3.08 0.115 0.118 0.121 d 2 1.75 1.87 2.00 0.069 0.074 0.079 d 3 0.20 0.25 0.30 0.008 0.010 0.012 e 1.82 1.90 1.98 0.072 0.075 0.078 e 2 1.38 1.50 1.63 0.054 0.059 0.064 e 3 0.45 0.50 0.55 0.018 0.020 0.022 e 0.65 bsc 0.026 bsc h 0.15 0.20 0.25 0.006 0.008 0.010 k 0.25 - - 0.010 - - k 1 0.30 - - 0.012 - - l 0.30 0.35 0.40 0.012 0.014 0.016
application note 826 vishay siliconix document number: 69948 www.vishay.com revision: 21-jan-08 9 application note recommended minimum pads for powerpak ? chipfet ? single 0.200 (0.00 8 ) recommended minim u m pads dimensions in mm/(inches) 0.225 (0.009) 0.650 (0.026) 0.300 (0.012) 0.350 (0.014) 0.300 (0.012) 0.100 (0.004) 0.250 (0.010) 0.500 (0.020) 0.350 (0.014) 0.350 (0.014) 0.305 (0.012) 2.575 (0.101) 1. 8 70 (0.074) 1.500 (0.059) 1.900 (0.075) return to index
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